Analog VLSI Implementation of Neural Systems
This volume contains the proceedings of a workshop on Analog Integrated Neural Systems held May 8, 1989, in connection with the International Symposium on Circuits and Systems. The presentations were chosen to encompass the entire range of topics currently under study in this exciting new discipline. Stringent acceptance requirements were placed on contributions: (1) each description was required to include detailed characterization of a working chip, and (2) each design was not to have been published previously. In several cases, the status of the project was not known until a few weeks before the meeting date. As a result, some of the most recent innovative work in the field was presented. Because this discipline is evolving rapidly, each project is very much a work in progress. Authors were asked to devote considerable attention to the shortcomings of their designs, as well as to the notable successes they achieved. In this way, other workers can now avoid stumbling into the same traps, and evolution can proceed more rapidly (and less painfully). The chapters in this volume are presented in the same order as the corresponding presentations at the workshop. The first two chapters are concerned with fmding solutions to complex optimization problems under a predefmed set of constraints. The first chapter reports what is, to the best of our knowledge, the first neural-chip design. In each case, the physics of the underlying electronic medium is used to represent a cost function in a natural way, using only nearest-neighbor connectivity.
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A Neural Processor for Maze Solving
RESISTIVE FUSES ANALOG HARDWARE FOR DETECTING DISCONTINUITIES IN EARLY VISION
CMOS INTEGRATION OF HERAULTJUTTEN CELLS FOR SEPARATION OF SOURCES
CIRCUIT MODELS OF SENSORY TRANSDUCTION IN THE COCHLEA
Issues in Analog VLSI and MOS Techniques for Neural Computing
DESIGN AND FABRICATION OF VLSI COMPONENTS FOR A GENERAL PURPOSE ANALOG NEURAL COMPUTER
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adaptation algorithm amplifier amplitude analog circuits analog VLSI architecture auditory fiber auditory-nerve fiber automatic gain control basilar-membrane bias current capacitor Carver Mead CMOS co-content cochlea connected constant continuous-time corresponding current mirror discontinuities disparity plane encode fabricated false matches filter fovea frequency gate gradient hair cells host computer I-V curves IEEE implementation integrated circuit intensity ISBN Koch layer lens linear logarithmic Mahowald maze Mead modules multiplier Neural Computation Neural Networks neural outputs neural systems neuron nonlinear operation optical optical flow output node output signals path Pathfinder pattern pixel Poggio processing nodes processors propagation region representation resistive fuse resistive network resistor response retina retina-like retinal input saturating resistor schematic sensor sharpness shown in Figure shows silicon simulation solution sources stereopsis switch chip synapse synaptic weights target threshold threshold voltage transconductance transfer function transistors wavefront zero
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Probabilistic and Stochastic Methods in Analysis, with Applications
J.S. Byrnes,Kathryn A. Hargreaves,Karl Berry
Ограниченный просмотр - 1992